1. Field of the Invention
The invention is in the field of integrated circuit (IC) packages and methods for making them.
2. Description of the Prior Art
Each semiconductor IC chip is required to be electrically and mechanically connected to a package or carrier for interfacing with a printed circuit or "mother" board and for protection from the environment and from workers because of the delicacy and almost microscopic size of the chip and its input/output wires.
The conventional IC chip package which has been the standard for many years is the "dual in-line package" (DIP), which is an elongated, rectangular ceramic package. However, the increasingly rapid advances in solid state technology with associated progressive miniaturization, increasing lead counts, and requirement for shorter and more uniform conductive trace lengths, have made the DIP with leads on only two sides increasingly inadequate. Thus, the relatively small ratio of a DIP's active device to package area results in an inefficient use of printed circuit board space, and may also cause handling problems with higher lead count designs. The size of a DIP is governed primarily by the number of leads required, and not by the size of the IC which it packages. Thus, as the number of leads increases the overall DIP size grows much more rapidly than the IC. For example, the die cavity in an 18 lead DIP is approximately 16 percent of the package area while the die cavity in a 64-lead DIP is only approximately 4 percent of the package size.
The internal conductive traces of a DIP are of widely differing lengths, becoming increasingly longer toward the longitudinal ends of the DIP. The inherent length of the internal traces toward the ends of the DIP, and the difference in lengths of the traces of a DIP, cannot always satisfy the electrical requirements of a high performance system.
Although DIP's still represent more than approximately half of the IC packages, because of their aforesaid inadequacies, the small, square ceramic "chip carrier" is coming into progressively increasing usage. The IC chip carrier has full peripheral contact geometry, and this results in greatly increased package density and area utilization, better and more uniform electrical performance, and more economical device packaging. To illustrate the greatly increased utilization of space, an 18-lead chip carrier with the same die cavity as a DIP utilizes only approximately 42 percent of the package area, while a 64-lead chip carrier utilizes only approximately 20 percent of the package area of the DIP.
However, despite such favorable aspects of ceramic chip carriers over DIP's, conventional prior art methods for manufacturing ceramic chip carriers have, in general, resulted in products with poor tolerances. These poor tolerances are exemplified by the specifications conventionally placed on ceramic chip carriers, which are plus or minus 1 percent or 0.003 inch, whichever is the greater. This could include irregularities as large as plus or minus 40 mils (0.040 inch) for a 4 inch by 4 inch array or matrix of 25 ceramic chip carriers, which is a conventional format employed during production of the carriers. One big disadvantage of such poor tolerances was that automatic die attaching equipment could not be employed for rapid attachment and electrical connection of chips to the carriers in array form. Another disadvantage of these poor tolerances was that reliable results could not be achieved with automatic testing equipment for testing the integrity of the IC's after mounting on the array without singulation to individual chip carriers.
The primary reason for the poor tolerances of conventionally manufactured ceramic chip carriers was that the round holes which provided semicylindrical peripheral recesses in the carriers and the scribe lines defining the edges of the carriers were cut when the ceramic blank was still in its "green" or plasticized stage. This cutting was accomplished by a sort of cookie cutter having tungsten carbide dies including round punches for punching out the holes and a razor die for cutting the scribe lines. Such mechanical die cutting could not be performed after the blank had been fired at high temperatures to sinter the particulate ceramic of the blank together and to vaporize off the organic binders in the blank because the ceramic material usually required for the chip carriers was alumina (Al.sub.2 O.sub.3), which is an extremely hard and abrasive material. Then when the blank was fired at the required high temperatures (usually in excess of 1550.degree. C.) to sinter the particulate ceramic together and vaporize out the organic binders, the blank underwent a generally uncontrollable shrinkage because of removal of the binder materials, flow of the ceramic particles during the sintering action itself, and variations in firing temperatures and atmospheres.
The resulting poor tolerances, and in particular, the uncertain locations of the semicylindrical peripheral recesses for the leads, required that the metallizing be done on the green blanks before high temperature firing. This not only resulted in poor tolerances of the metallization because of irregular shrinkage caused by high temperature firing, but also necessitated use of a high temperature metal such as tungsten or molybdenum-manganese for the metallization. Such high temperature metals have poor electrical conductivity, which then necessitated the further step of plating the metallization after the firing with a metal having good electrical conductivity and good solderability.
There are other problems in the prior art use of round holes to provide semicylindrical peripheral recesses in prior art ceramic IC carriers. One such problem is that the relatively large cross-sectional hole opening relative to peripheral surface area of the round holes made the vacuum drawing of metallizing paste through the holes very inefficient, most of the vacuum being wasted in the central part of the hole where the vacuum-created airflow had no useful effect on movement of the metallizing paste. Another such problem was that the continuous curvature of the round holes drew the metallizing paste all of the way around the holes due to capillary action and/or forces involved in the vacuum drawing, and it was not possible to selectively metallize internal portions of the semicylindrical peripheral recesses leaving nonmetallized insulative regions proximate the edges of the carriers. This resulted in electrical connection between all of the carriers in an array or matrix thereof, which prevented use of automatic testing equipment for testing the integrity of the IC's in array or matrix form, and required that the carriers first be broken apart before testing, and then tested individually.
Although a prefired, sintered ceramic blank can be readily cut or machined with a laser beam, prior attempts to cut round holes and scribe lines by means of a laser have been generally unsatisfactory and unduly costly, and therefore have not come into any appreciable use. While the scribing could be accomplished by straight-line movement of the laser beam, cutting round holes larger than 0.010 inch diameter with a laser was tedious and complex, requiring that the laser delivery head be stopped and then moved around in a tight circular orbit to machine or cut each of the holes.
Applicant is aware of no prior art teaching in which straight-line movement of a laser beam has been employed to machine alternating scribes and via slots or holes through a high temperature-sintered ceramic sheet for production of an array or matrix of IC chip carriers (via slots or holes being provided for metallized conductors from the tops to the bottoms of the carriers). The Tijburg U.S. Pat. No. 4,224,101 taught continuous scribing on a semiconductor disk by means of a YAG laser, and the Garibotti U.S. Pat. No. 3,112,850 taught continuous scribing of conductor wafers or ribbons, or alternatively alumina, beryllia, or other materials, using a high energy electron beam. However, neither Tijburg nor Garibotti taught the possibility of alternately scribing and machining slots or holes, and in particular, neither Tijburg nor Garibotti taught how such alternate scribing and machining of slots or holes could be accomplished, or suggested any type of equipment that might be used to perform such alternate scribing and machining of slots or holes. Neither the YAG laser of Tijburg nor the electron beam of Garibotti would be capable of such sequential scribing and machining of slots or holes in a high temperature-sintered ceramic blank.
The Ramspacher, Jr. U.S. Pat. No. 4,366,198 taught straight-line sequences of diamond-shaped apertures and elongated slots in a printed circuit board substrate for providing a break line. However, the Ramspacher, Jr. teaching was to punch out the diamond-shaped apertures and slots, which was readily accomplished with the relatively easily-worked insulating circuit board material of Ramspacher, Jr. such as phynolic material or an epoxy/fiberglass sandwich. Ramspacher, Jr. taught diamond-shaped apertures which were squares 0.062 inch on a side, which could readily be punched out but would require a completely impractical amount of back and forth and lateral movement if a laser were attempted to be used. The large size of the apertures and slots, and the diamond shape of the apertures, would preclude any straight-line laser movement to produce the Ramspacher, Jr. break line.
Prior to the present invention, flat leads or input/output terminals have been difficult to use for IC chip carriers despite the potential advantages of increased contacting area with the metallization conductors of the carrier and simplified manufacture of the terminals by stamping. It is difficult to achieve a good mechanical connection between flat leads and the prior art semicylindrical lead notches. The prior art round holes did not provide enough cross-sectional space for use of paired or double leads insulated from one another, so that if it were desired to leave an array of chip carriers connected together, only a single round pin could be used in each hole, whereby the conductors of adjacent carriers leading to that pin would both have to be connected to the same electrical location on a circuit board, and in many cases only one of them therefore was usable.
Also not done in this art prior to the present invention was to put circuit components such as resistors, capacitors, moisture sensors, or the like directly on an IC chip carrier, although there is frequently a need for one or more of such components in a chip carrier. For example, it is often an advantage to protect one of the chip inputs from static surges, or to condition the electrical output of an IC before the electrical signal leaves the package, and this could most conveniently be accomplished by a ribbon of resistor material right on the surface of the chip carrier between the corresponding input conductive trace of the carrier and ground or common bus conductive trace of the carrier. It is believed that such circuit components have not heretofore been provided directly on IC chip carriers because of the difficulties of properly locating and sizing such circuit components relative to the poor tolerances of the conductive traces and metallization conductors of the carriers. Also, available resistor materials for this purpose generally require air-firing, typically at approximately 850.degree. C., which had to be done after the conventional metallization with tungsten or molybdenum-manganese had been completed; however, exposure of such metallization to air atmospheres at temperatures over about 600.degree. C. would result in oxidation of the metallization with subsequent electrical and physical quality degradation.